The present invention relates generally to a sputtering apparatus, and more particularly to a sputtering apparatus which enables the deposition of a thin metallic film which has superior step coverage.
As is well known, in the production of semiconductor integrated circuits, bubble memory elements and the like, a deposition method, such as vacuum evaporation, sputtering or CVD (Chemical Vapor Deposition), is employed in order to form various types of thin films. Of these methods, sputtering has an advantage in that it has the capability of forming a high -melting-point metal film and a thin film with a composition similar to that of a target and with a sufficient uniformity. Therefore, sputtering deposition is widely used for the formation of various kinds of metal or alloy films such as W, Mo or Al-Si alloy, or of an insulating film such as SiO.sub.2, Al.sub.2 O.sub.3 or Ta.sub.2 O.sub.5. Furthermore, since sputtering is advantageous in that the impurity content of the deposited film is extremely small, this method has replaced conventional vacuum evaporation for the purpose of forming a film of a metal having a relatively low melting point, such as Al.
In spite of the above-described large advantages, sputtering has the disadvantage of an inferior step coverage.
More specifically, sputtering is a deposition process in which Ar.sup.+ ions are made to collide against a target made of the same material as that of the thin film to be deposited, so as to make particles sputter out of the target, and the thus-sputtered particles are deposited on a silicon substrate which is so disposed as to face the target. Since the target has a relatively large area, the sputtered particles are dispersed in random directions. For this reason, although a large number of metal particles are deposited on the flat surface of the silicon substrate and a suitable film is thereby formed thereon, only a small number of metal particles are deposited within any minute recesses or grooves which may exist in the substrate surface. Therefore, it is difficult to properly cover or fill the minute recesses or grooves in the substrate surface with sputtered particles. In particular, as the integration density of semiconductor devices has increased, such recesses and grooves have become greatly reduced in width. However, since the depth of these recesses and grooves has not substantially altered (hence, their aspect ratios, i.e., their depth/width ratios have increased), it is extremely difficult to satisfactorily fill the recesses and grooves with metal vapor by sputtering.
To solve the above-described problem, a process called bias sputtering has been proposed.
This process usually employs an apparatus such as shown in FIG. 1. As illustrated in FIG. 1, a cathode 11 is connected to a direct-current or high-frequency electric power source (not shown in the drawing). A gas such as Ar is introduced into a vacuum chamber 10, and the cathode 11 is negatively biased by the application of an electric voltage to the cathode 11, thereby causing a glow discharge. The Ar ions generated by the glow discharge are incident on the surface of the cathode 11 and etch a target 13 placed on a surface of the cathode 11. When a shutter 14 is released, the particles of the etched target 13 are directed toward a substrate electrode 12, and are thus deposited on a silicon substrate 16 placed on the substrate electrode 12. During this time, if a high-frequency voltage is applied to the substrate electrode 12 as well, the Ar ions are also made to be incident on a substrate electrode 12, so that some of the particles deposited on the surface of the silicon substrate 16 are etched again (hereinafter referred to as the "resputtering effect"). The ratio of the amount of reetched particles to that of the particles deposited on the silicon substrate 16 is hereinafter referred to as the "resputtering rate".
The use of the above-described bias sputtering process provides the advantage of flattening the surface of the deposited film and greatly improving the step coverage. In addition, as set forth in Ext. Absts. ECS 164th Meeting, p.438, 1983, the use of a planar magnetron cathode as the cathode 11 enables great improvements in the deposition rate of particles, while the flattening effect is maintained to the same extent.
However, it has been found that such a bias sputtering process has the following two drawbacks. The problem lies in the fact that the formation of a thin film must be carried out with a fairly high resputtering ratio in order to achieve a sufficient flattening effect and good step coverage. When the resputtering ratio is low, voids are occasionally produced within the deposited film, as shown in unexamined Japanese patent publication No. 170258/1984 which has already been laid open to public inspection in Japan. Conversely, if the resputtering ratio is increased to prevent the occurrence of these voids, the particle deposition rate is greatly lowered. The second problem is that the uniformity of the deposited film is greatly decreased by applying a biasing voltage to the substrate electrode 11. unexamined Japanese patent publication No. 50312/1983 refers to this problem.
It is obvious that these problems provide a large obstacle to the formation of printed circuitry or a dielectric film for a semiconductor device by means of sputtering. Therefore, there is a great need for a sputtering method by which a metallic film having a good step coverage and uniform film thickness can be obtained sufficiently rapidly.